Publicly funded projects & industry associations

The CHASSIS initiative represents a strategic leap forward in automotive compute platform design for Software-Defined Vehicles (SDVs). The project focuses primarily on pioneering chiplet-based architectures to overcome the limitations of traditional monolithic System-on-Chips (SoCs). Ultimately, we aim to redefine how automotive electronics are developed, integrated, and deployed across vehicle segments.

CHASSIS receives funding within the Chips Joint Undertaking (Chips JU) – the Public-Private Partnership for research, development and innovation under Horizon Europe – and National Authorities under grant agreement 101252788.

The project’s mission is to reduce the environmental footprint of semiconductor manufacturing while enabling innovation across materials, monitoring, and reuse.

FastLane targets a full, highly competitive and sustainable European value chain for Silicon Carbide (SiC) based power electronics. The consortium includes 29 partners from seven European countries and includes cutting edge research facilities, highly specialized SMEs and well-known industrial partners under the lead of Valeo.

The projects SAM3 and FA4.0 showed the success of a framework for collaborative development in failure analysis. It also already showed how thorough failure analysis contributes to quality and success of semiconductor industry especially in fields like autonomous driving and energy production with extraordinary quality requirements. The still running project FA4.0 already shows us the value of applying AI-algorithms and what new applications can be targeted with these methods, improving efficiency as well as productivity in our analysis process. The project also shows that typical failure analysis data landscapes lack the ability to easily apply these new methods.

Thus, an important target for project FA2IR is to get FA-databases AI-ready and to further develop the AI-based methods developed in FA4.0 for image and measurement data analysis. This shall also include the FAIR-data principle (Findable, Accessible, Interoperable, Reusable). Therefore, we will employ a universally accepted data format that enables companies and suppliers to effortlessly exchange data with one another while ensuring effective protection of intellectual property and confidential data.

Additionally, with improved database landscapes, also new methods for AI-based database search shall be enabled. A FA-ontology enables a standardization of contents and is the basis for linking all relevant data within an analysis. This shall allow clearer and faster prediction of analysis results and next steps within analysis cases and therefore help to improve quality and turn-around-time of analysis jobs. Linking these AI-ready Databases to other databases within the value chain of semiconductor development and production process will enable utilization of the knowledge stored within FA-databases also in these fields. Prediction of failures already in the design phase or understanding failure modes in the qualification phase of new products based on comparable older products will thus be supported by AI. The current existing commercial database systems of project partners shall also be extended in the described way to have FA-AI-ready databases available on the market.

The consortium will include partners from Germany, France, Sweden, and Austria but we will promote extended intra-European exploitation. The consortium will also further develop the standardization topics started in FA4.0.

Therefore, the extended network of SEMI member companies will set up standards to allow the whole semiconductor market to follow the principles defined within FA2IR-project. Presentation of all project results and SEMI task force results will be regularly presented at FA conferences IPFA, ISTFA and CAM-WS.