DMU - DMA Unit
Benefits
Offloads tasks from the CPU to the DMA controller
Enables DMA transfers of M_CAN FIFO elements and optional TSU timestamps between Message RAM and system memory.
Available for integration into microcontrollers, ASICs, and FPGAs.
DMA unit for ASIC Design
DMU
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Deliverables
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DMA unit for FPGA Design
Intel / Altera
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AMD / Xilinx
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Deliverables
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DMU details