Chiplet-based architecture
What is a chiplet-based architecture?
A chiplet-based architecture is a semiconductor design approach that partitions system functionality across multiple discrete silicon dies (chiplets) that are integrated together in a single package. Each chiplet is typically fabricated on an optimized process node for its specific function, allowing heterogeneous integration of different technologies within one system. Unlike traditional monolithic system-on-chip (SoC) designs where all components exist on a single die, chiplet architectures enable mixing of different process technologies, IP blocks, and even suppliers within the same package.
Where are chiplet-based architectures used?
Chiplet-based architectures are primarily used in centralized, high-performance automotive compute platforms, including ADAS/automated driving systems, infotainment, and cross-domain vehicle controllers in software-defined vehicles.
In these systems, chiplets enable a function-driven decomposition of compute,where different functions benefit from different semiconductor technologies. As an example dvanced driver assistance systems (ADAS) and autonomous driving platforms utilize chiplets to combine high-performance computing cores fabricated on advanced process nodes with specialized automotive-grade circuits on mature, proven processes. Beyond ensuring strict functional isolation, this architecture enables the highly efficient sharing of hardware resources across traditionally siloed vehicle domains. Instead of duplicating costly components, multiple virtualized systems can dynamically share centralized memory, high-speed input/output (I/O) interfaces, and neural processing units (NPUs) through high-bandwidth, on-package interconnects.
The approach enables automotive system designers to achieve higher integration while maintaining the ability to source critical components from different suppliers or use different process technologies for optimal performance and cost positioning, as well as maximize hardware utilization while maintaining the rigorous safety boundaries required for automotive certification.
How do chiplet-based architectures compare to monolithic SoCs?
Chiplet architectures represent a fundamental shift from monolithic SoC integration, where the primary distinction lies in manufacturing approach and technology optimization. Monolithic SoCs implement all functionality on a single silicon die using one process technology, while chiplet systems distribute functions across multiple dies that can each use optimized process nodes.
| Attribute | Chiplet architecture | Monolithic SoC |
|---|---|---|
|
Attribute
Process optimization
|
Chiplet architecture
Each chiplet uses optimal process node
|
Monolithic SoC
Single process node for all functions
|
|
Attribute
Design flexibility
|
Chiplet architecture
Mix different technologies and suppliers
|
Monolithic SoC
Limited to single foundry ecosystem
|
|
Attribute
Development effort
|
Chiplet architecture
Higher integration and validation complexity
|
Monolithic SoC
Simpler single-die verification
|
|
Attribute
Yield impact
|
Chiplet architecture
Defects affect individual chiplets only
|
Monolithic SoC
Defects affect entire SoC
|
The heterogeneous integration capability of chiplets allows automotive designers to combine analog sensor interfaces fabricated on mature 22nm processes with digital processing cores on advanced 5nm nodes, maximizing both performance and reliability for automotive qualification requirements.
How does Bosch utilize chiplet-based architectures?
Bosch sees chiplet technology not only as technical innovation, but also as a potential breakthrough for software-defined mobility.At Bosch, we’ve recognized that pursuing an open ecosystem for chiplet technology is critical for the advancement of software-defined mobility. This is reflected in our active involvement in several collaborative initiatives with major actors from industry and research. Bosch has taken a leading role in the CHASSIS initiative – which stands for Chiplet-based Architectures for Software-Defined Vehicles.
Bosch aims to become the go-to provider for automotive chiplet systems and shape the future of automotive computing itself through open standards. The company is doing this by:
- Coordinating the CHASSIS initiative: taking a leading role in bringing together key industry players and research institutions.
- Driving standardization: Actively working with partners to create common standards for automotive chiplets.
- Shaping the future: Influencing key design choices and architectures to ensure chiplet technology meets the evolving needs of software-defined vehicles.
- Comprehensive expertise: Leveraging its deep understanding of both automotive systems and semiconductor design and integration.
Frequently Asked Questions
What is a chiplet-based architecture?
A chiplet-based architecture partitions system functionality across multiple discrete silicon dies integrated in a single package, rather than implementing all functions on one monolithic chip. Each chiplet can be optimized for its specific function using different process technologies.
How do chiplets connect and communicate?
Chiplets connect through high-speed interconnects implemented at the package level, including silicon interposers, organic substrates with embedded routing, or direct die-to-die connections. Communication protocols range from proprietary interfaces to standardized solutions like Universal Chiplet Interconnect Express (UCIe).
What role does advanced packaging play?
Packaging serves as the integration platform that enables electrical, thermal, and mechanical connections between chiplets. Advanced packaging technologies like 2.5D and 3D integration provide the high-density interconnect capabilities required for chiplet communication while managing thermal dissipation across multiple dies.
What are key design decisions for chiplet partitioning and interfaces?
Critical decisions include functional partitioning boundaries, interface bandwidth requirements, and power domain allocation across chiplets. Designers must balance communication latency against integration complexity while ensuring each chiplet can be independently tested and qualified for automotive applications.
What are major risks in chiplet integration and testing?
Primary risks include increased system-level validation complexity, potential performance bottlenecks at inter-chiplet interfaces, and challenges in fault isolation during testing. Thermal management becomes more complex with multiple heat sources, and supply chain coordination across different chiplet suppliers requires careful qualification management.


